/*
 * Copyright (c) Huawei Technologies Co., Ltd. 2021-2023. All rights reserved.
 * Description: UDK memory barrier for x86 architecture header file
 * Author: -
 * Create: 2021.4.20
 */

#ifndef UDK_MEMBARRIER_X86_H
#define UDK_MEMBARRIER_X86_H

#include <emmintrin.h>

/*
 * Prefetch specific memory to all cache include L0 cache.
 */
static inline void udk_prefetch0(const volatile void *p)
{
    asm volatile("prefetcht0 %[p]" : : [p] "m" (*(const volatile char *)p));
}

/*
 * Insert a hardware memory barrier to ensure no out-of-order write operations.
 */
#define udk_wmb() _mm_sfence()

/*
 * Insert a hardware memory barrier to ensure no out-of-order read operations.
 */
#define udk_rmb() _mm_lfence()

/*
 * Insert a hardware memory barrier to protect both read and write operations.
 */
#define udk_mb() _mm_mfence()

/*
 * Write memory Barriers for multiprocessors.
 */
#define udk_smp_wmb() asm volatile("" : : : "memory")

/*
 * Read memory Barriers for multipocessors.
 */
#define udk_smp_rmb() asm volatile("" : : : "memory")

/*
 * Memory Barriers for multipocessors.
 */
#define udk_smp_mb() asm volatile("lock addl $0, -128(%%rsp); " ::: "memory")

/*
 * Compiler barrier.
 */
#define udk_compiler_barrier()           \
    do {                                 \
        asm volatile("" : : : "memory"); \
    } while (0)

#endif /* UDK_MEMBARRIER_X86_H */